awards grant
- 3-D Dopant Profiles of Halo/Extension Regions
- Architectures for Nano-Cmos
- Automatic Multi-Threaded Benchmark Synthesis for Validation of Performance and Power Models of Multi-Core Processors
- Automatic Rf Impedance Correction Circuits for Soc Rf/Mixed-Signal Ate Test
- Automatic Rf Impedance Correction Circuits for Soc Rf/Mixed-Signal Ate Test
- Broadband Material Characterization for Next Generation Packaging and Interconnects:Measurements and Modeling
- Cmos Compatible Graphene/Graphite Electronics Using Plasma Enhanced Chemical Vapor Deposition.
- Digital Assisted Millimeter-Wave Cmos Circuits
- Electrical Characterization of Strained Si
- Embedded Test for Mixed-Signal/Rf Ics
- Feasibility of Implementing Cmos Rf Front-End Circuits for 76-77 Ghz Radar Applications
- Heterogeneous Multi-Core Architectures Based on Nanowire, Nanotube, and Graphene Transistors.
- High Speed I/O Bist
- Ibm-Src Fellowship in the Src Graduate Fellowship Program (Jacques)
- Id Strained Gan Nanowire Transistors
- In Situ High Speed I/O Characterizatin of Stacked Ic and 3-D Packages and Interconnects
- In Situ Stacked Chip and 3D Package Characterization Modeling and Verification.
- In-Situ Characterization of High-Speed Digital and Rf Interconnect-Chip-Package Systems
- Intel Foundation / Srcea Scholoarship for Lindsi Gass
- Intel Foundation/Srcea Scholarship for Leah Edelman
- Intel Foundation/Srcea Scholarship for Ms. Nicole Rowsey
- Investigation of Stress Effects on Thin-Frame Pzt Ferroelectric Capacitors for Fram Enhancement
- Ion Implantation and Flash Annealing Modeling of Alternate Channel Materials
- Iptrust: a Comprehensive Framework for Ip Integrity Validation
- Low Resistance Ohmic Contacts
- Mcda: a Multi-Element and Multi-Objective Optimization Approach for Allocating Tasks to Multi-Core Processors
- Process and Device Simulation of Contact Technologies
- Simulation and Verification of Advanced Technologies
- Simulation and Verification of Advanced Technologies
- Simulation of Fluorine and Boron-Fluorine Behavior in Silicon
- Src Graduate Fellowship Program (Gable)
- Src Grant No. 2006-Hj-1327Eg Instrument Support for Feasibility Study of Implementing Cmos Rf Front-End Cir
- Src/Ibm Scholarship for Heather E. Randell
- Strain Engineered Hi-K Hafnium Oxide Ferroelectric Thin Films Towards Multi-Functional Sensor/Logic Acuator/Memory
- Strain Enhanced Mobility in Power Mosfets
- Strained Si Scaling to 65, 45, and 32nm Technology Nodes
- The Oxide Measurements and Future Transistor Modules
- Unrestrictive Non-Overhead Bearing Gift for Research on Simulation and Verification of Advanced Technologies
- Using Strain to Enhance Performance in Ge and III-V Semiconductors